A MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is known as a typical field effect transistors. A conventionally-known method for controlling a threshold voltage of a MOSFET is to adjust an amount of impurity (channel impurity) injected to a channel region. In recent years, the amount of channel impurity has been increased with increasing miniaturization of a device. This is essential for improving device performance based on the scaling law. To increase the amount of channel impurity is also necessary in a low power consumption device and the like that require a high threshold voltage.
However, the increase in the channel impurity causes decrease in a driving current due to impurity scattering, increase in a GIDL (Gate Induced Drain barrier Lowering) current, and increase in a substrate current when a substrate voltage is applied. That is to say, a device in which a large amount of impurity is injected into the channel region has such problems as the decrease in the driving current and the increase in the GIDL current. Furthermore, in a semiconductor device which actively utilizes the substrate bias effect, there is a problem that the substrate current is increased at the time when the substrate voltage is applied.
Therefore, methods have been proposed which control the threshold voltage without increasing the amount of channel impurity.
Japanese Laid-Open Patent Application No. JP-P2006-93670 (patent document D1) describes a method to control the threshold voltage by incorporating a metal element such as Hf at an interface between a gate electrode and a gate insulating film. More specifically, concentration of the metal element is changed in a range from not less than 1×1013 atoms/cm2 to less than 4×1015 atoms/cm2. Here, the metal element concentration means surface concentration of metal atoms when all the metal atoms included in the gate insulating film are gathered on one plane. The threshold voltage is controlled by changing the metal element concentration within the above-mentioned range. At this time, it is possible to reduce the amount of impurity in the channel region depending on the metal element concentration.
Another technique is described in a paper by Y. Shimamoto et al., “Advantages of gate work-function engineering by incorporating sub-monolayer Hf at SiON/poly-Si interface in low-power CMOS”, 2005 Symposium on VLSI Technology Digest of Technical Papers, pp. 132-133. According to the technique, the threshold voltage is controlled and hence mobility is improved by incorporating Hf between a polysilicon gate electrode and a SiON gate insulating film. The threshold voltage depends not only on the amount of Hf but also on an amount of nitrogen included in the base SiON film. Therefore, a desired threshold voltage can be obtained by controlling the amount of nitrogen as well.
Meanwhile, there is also known a technique of using high-permittivity material to form a gate insulating film of a MOSFET. Typical high-permittivity material is exemplified by oxide which contains a metal element such as Zr, Hf, Al and La. By applying such the high-permittivity material to the gate insulating film of the MOSFET, it is possible to increase a physical thickness of the gate insulating film with keeping an electrical thickness thereof thin.
In order to improve electrical characteristics of the MOSFET, it is generally required to increase a MOS capacitance, i.e. to make the gate insulating film thinner. In that case, however, it is necessary to suppress increase in a leakage current accompanied by the thinning of the gate insulating film. In the case of the high-permittivity material gate insulating film, a desired MOS capacitance can be realized with a larger physical film thickness as compared with a case where a silicon oxide film is used as the gate insulating film. As a result, not only the electrical characteristics of the MOSFET are improved but also the gate leakage current is reduced as compared with the case of the silicon oxide film.
Japanese Laid-Open Patent Application No. JP-P2004-259906 (patent document D2) describes a gate insulating film that includes silicon, oxygen, nitrogen and metal. Respective concentrations of metal and nitrogen are highest at a central portion of the gate insulating film. On the other hand, concentration of silicon is highest on a surface side of the gate insulating film and on a silicon substrate interface side.
Japanese Laid-Open Patent Application No. JP-P2003-204061 (patent document D3) describes a gate insulating film that includes a silicon oxide film containing a metal element and nitrogen. A concentration distribution in a thickness direction of the metal element included in the silicon oxide film has a maximum value at a central portion of the silicon oxide film. A concentration distribution in the thickness direction of nitrogen included in the silicon oxide film has a maximum value at an interface between a gate electrode and the gate insulating film.
Japanese Laid-Open Patent Application No. JP-P2003-158262 (patent document D4) describes a gate insulating film that includes silicon, oxygen, nitrogen and a metal element. Concentration of the metal element in the gate insulating film is highest on an interface side between a gate electrode and the gate insulating film. On the other hand, concentration of nitrogen in the gate insulating film is highest on an interface side between the gate insulating film and a semiconductor substrate.
Japanese Laid-Open Patent Application No. JP-P2005-45166 (patent document D5) describes a gate insulating film that includes metal, silicon, oxygen and nitrogen. Concentration of nitrogen in the gate insulating film is maximum at an interface with respect to a gate electrode and minimum at an interface with respect to a silicon substrate. On the other hand, concentration of the metal in the gate insulating film is minimum at the interface with respect to the gate electrode and maximum at the interface with respect to the silicon substrate.
Japanese Laid-Open Patent Application No. JP-P2001-332547 (patent document D6) describes a gate insulating film consisting of a metal silicate layer. In the metal silicate layer, concentration of the constituent metal gradually decreases from an interface between a gate electrode and the metal silicate layer toward an interface between a silicon substrate and the metal silicate layer.
Japanese Laid-Open Patent Application No. JP-P2004-31760 (patent document D7) describes a gate insulating film made by introducing nitrogen into metal oxide or metal silicate. Concentration of nitrogen in the gate insulating film has a distribution in a film thickness direction. A position at which the nitrogen concentration takes a maximum value exists in a region away from a silicon substrate.
Japanese Laid-Open Patent Application No. JP-P2005-251785 (patent document D8) describes a semiconductor device in which nitrogen is selectively introduced into a high-permittivity insulating film in a depth direction.